I just came across an unexpected behavior of the mentioned DAC when using it in synchronous mode (see attached file).
In the datasheet it is described as follows: "In synchronous mode, data update occurs with the falling edge of the 24th SCLK cycle". In my case, the data update leads to a 2us delay, on rising edges and an almost instantaneous response on falling edges.
Is this behavior desired? In the datasheet, I haven't found any additional info on the propagation delay. I'm currently setting up the DAC with 0x380001 and 0x200003.
The data is then sent with 0x18XXXX, where XXXX contains the data.
Additional tests have shown, that the delay appears to vary depending on the data:
0x0000->0x8000 takes 2us until a change in the output can be recognized
0x0001->0x8000 takes 2us until a change in the output can be recognized
0x0010->0x8000 takes 2us until a change in the output can be recognized
0x0100->0x8000 takes 1us until a change in the output can be recognized