Hi,
Can you please review the attached design and suggest if any changes to be made?
Input range 7dBm, 50 ohms impedanceADC_1.pdf
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Ranjini
The schematic looks good. I would suggest removing two of the four decoupling caps on the NB_ADC_AVDD_3V3 pins since there are only 2 input pins. Same with NB_ADC_DVDD_1V8 (remove the extra one). For all three power buses, I would add a bulk capacitor (10uF) and try to place these close as possible to the pins.
Regards,
Jim
Ranjini,
I would suggest using a single ground plane and isolate the sensitive analog traces from the high speed digital traces. See the attached document for more guidelines.
Regards,
Jim