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ADS7038Q1EVM-PDK: First Read Back of SEQUENCE_CFG Register Shows Incorrect Reserved Value Of Bit 7.

Kier
Mastermind 6250 points
Part Number: ADS7038Q1EVM-PDK
Other Parts Discussed in Thread: LAUNCHXL-F28379D, , ADS7038

Hello,

We bought the ADS7038Q1EVM-PDK evaluation board. I removed the daughter-board containing the ADC IC from the PAMboard and connected it directly to my LAUNCHXL-F28379D board.

My LP program is ostensibly talking to the ADC at 500kbps using SPIB and I am able to get plausible samples on AIN0. However, I have a strange register read back I cannot explain.

I have the following sequence:

                    SDI

  1. 0x18 0x01 0x01 : Set the RST bit in the GENERAL_CFG to reset the device.
  2. 0x18 0x00 0x01 : Set the BOR bit in the SYSTEM_STATUS to clear it.
  3. 0x08 0x10 0x00 : Write 0x00 to SEQUENCE_CFG to select manual mode.
  4. 0x10 0x10 0x00 : Request read (back) of SEQUENCE_CFG register.
  5. 0x00 0x00 0x00 : Dummy data. Contents of SEQUENCE_CFG is on SDO = 0x80 -> Unexpected/invalid value?
  6. 0x10 0x10 0x00 : Request read (back) of SEQUENCE_CFG register.
  7. 0x00 0x00 0x00 : Dummy data. Contents of SEQUENCE_CFG is on SDO = 0x00 -> Expected value.

 

Why does the read back of SEQUENCE_CFG contains 0x80 in step (5)? According to the manual, bit 7 should always read back 0 as per identical step (7).

Thank you very much.

  • 0
    TI__Mastermind 24940 points

    Hello, 

    This is extremely odd, does this happen every time, meaning you have to read the register twice to get correct date, or is it only at initiation?

    Does it only happen with this register, can you read other register content without having to do it twice?

    Regards

    Cynthia

  • 0 in reply to Cynthia
    Mastermind 6250 points

    Hello Cynthia,

    Thanks for the response.

    It can happen on more than one occasion but after it's correct, it remains correct until the next reset command.

    Yes it happens on other registers although in the case (DATA_CFG) below they are not reserved bits.

    I found the cause in the end. I guessed that the problem persists for x microseconds after a reset command then I found this:

    If implement a 5ms delay after reset then there is no issue.

    It does mean that the ADS7038 Example C code....

    https://www.ti.com/lit/zip/sbac294

    ...requires modifying as follows:

    Please pass it on to the devs.