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ADS1115: Opened channel has noise

Guru 11170 points
Part Number: ADS1115

Hello E2E,

I set;
AN0 and AN1 -> CH1, open (no signal)
AN2 and AN3 -> CH2 has analog input.

When I2C-clock 200kHz, CH1 and CH2 are normally. However, when clock frequency change to 400kHz, CH1 has noise synchronised with analog input on CH2.

The procedure for accessing the device is as follows;
① PointerRegister 0x01 Write  ⇒ConfigRegister
0x90 0x01

② Config Register  Write
0x8B 0xE3
SingleConversion 1
AN0-AN 000
±0.256V 101
SingleShootMode 1
DataRate 111
COMP_MODE 0
DisableComparater 0011

③ Waite 2ms

④ PointerRegister 0x00 Write   ⇒ConversionRegistor
0x90 0x00

⑤ ConversionRegistor 16bit Read
0x91 2byte Read

⑥ PointerRegister 0x01 Write  ⇒ConfigRegister
0x90 0x01

⑦  Config Register Write
0xBB 0xE3
SingleConversion 1
AN2-AN3 011
±0.256V 101
SingleShootMode 1
DataRate 111
COMP_MODE 0
DisableComparater 0011

⑧ Waite 2ms

⑨ PointerRegister 0x00 Write   ⇒ConversionRegistor
0x90 0x00

⑩ ConversionRegistor 16bit Read
0x91 2byte Read

Q1: Can TI advice about this case?
Q2: Is there a problem with the access procedure?

Bast regards,
ACGUY

  • Hello ACGUY,

    I don't see anything immediately wrong with the access procedure. Is it possible to share the following?

    • A full schematic
    • scope captures of the I2C transactions as well as some close up captures of the I2C transactions to get a better look at the clock and data timings.
    • more clarification on the noise seen. Is this shown in the conversion results? If so, can you share the data with and without the noise impact?

    Regards,
    Aaron Estrada

  • Hi Aaron,

    Thank you for reply.
    I want to send information you on private message.
    If I apply for a friend to you, do you accept it?

    Best regards,
    ACGUY

  • Hi ACGUY,

    Sure! Feel free to shoot a friend request and you can happily share some more sensitive information. 

    Regards,
    Aaron Estrada

  • Hi Aaron,

    I applied for a friend to you.
    And, I found description about 400-kHz clock on "9.5.1.3 I2C Speed Modes".

    It seems that a special address byte of 00001xxx needs to be sent after the START condition to activate fast mode, is that necessary for all access operations?

    What is the Hs Master Code? What determines it?

    Will it send 00001xxx right after tBUH?

    Regards,
    ACGUY

     

  • Hello ACGUY,

    I accepted your friend request. Feel free to send the appropriate scope shots/schematic there. 

    Regarding the High Speed Mode... this mode is only used for speeds > 400kHz so it shouldn't apply in your case. High speed mode is activated by the controller sending the byte 0000 1xxx where 'xxx' is a master code determined by the MCU/controller. This byte should be sent right after a the initial start command and will put the ADC in a high speed mode until a stop command is issued. 

    Since you are using 400kHz I2C speed, this mode should not apply to you. 

    Regards,
    Aaron Estrada