Hello E2E,
I set;
AN0 and AN1 -> CH1, open (no signal)
AN2 and AN3 -> CH2 has analog input.
When I2C-clock 200kHz, CH1 and CH2 are normally. However, when clock frequency change to 400kHz, CH1 has noise synchronised with analog input on CH2.
The procedure for accessing the device is as follows;
① PointerRegister 0x01 Write ⇒ConfigRegister
0x90 0x01
② Config Register Write
0x8B 0xE3
SingleConversion 1
AN0-AN 000
±0.256V 101
SingleShootMode 1
DataRate 111
COMP_MODE 0
DisableComparater 0011
③ Waite 2ms
④ PointerRegister 0x00 Write ⇒ConversionRegistor
0x90 0x00
⑤ ConversionRegistor 16bit Read
0x91 2byte Read
⑥ PointerRegister 0x01 Write ⇒ConfigRegister
0x90 0x01
⑦ Config Register Write
0xBB 0xE3
SingleConversion 1
AN2-AN3 011
±0.256V 101
SingleShootMode 1
DataRate 111
COMP_MODE 0
DisableComparater 0011
⑧ Waite 2ms
⑨ PointerRegister 0x00 Write ⇒ConversionRegistor
0x90 0x00
⑩ ConversionRegistor 16bit Read
0x91 2byte Read
Q1: Can TI advice about this case?
Q2: Is there a problem with the access procedure?
Bast regards,
ACGUY