DAC63204: DAC63204

Pavel Margulis

Part Number: DAC63204

Hello,

In SPI mode, what is a delay time between the rising edge of the SCLK and a stable new data at the SDO, a so called t_SDODLY?

It is marked on the Figure 6-3 and not defined in the tables, at least I didn't find it.

Thank you

Pavel Margulis

0 Akhilesh K over 2 years ago

Hi,

Please see the SPI read timing diagram information below. t_SDODLY = 100nS (max)

Regards,

0 Pavel Margulis over 2 years ago

Hello Akhilesh,

Thank you for quick reply.

Is the minimal value of it known?

Thank you

Pavel Margulis

0 Akhilesh K over 2 years ago in reply to Pavel Margulis

Hi,

No minimum value is specified for this parameter

Regards,

+1 Pavel Margulis over 2 years ago in reply to Akhilesh K

Thank you

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