Hi team,
When connecting with FPGA through JESD204B interface, if the differential pair P / N is crossed, can it be connected in P / N swap (that is, xx_P of the differential pairs of FPGA is connected to DX_M of ADC)?
As shown in the figure below, the connector of FPGA board on the backplane is on the left. It is connected to ADC through JESD204B , but the wiring path needs to be crossed.
If the polarity of the differential pair cannot be swapped, it is necessary to drill holes for layer change connection. Does cross layer wiring affect the data rate of 3.2GHZ? What should we pay attention to? Or are there other solutions?
Best Regards,
Amy Luo
