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ADS54J66: Termination requirement for SYNCbAB & SYNCbCD

Part Number: ADS54J66

Hi

Let me Know the termination required for SYNbAB & SYNbCD pins.

Datasheet recommends to provide termination and also in Figure 144. Application Diagram for the ADS54J66, it is mentioned to provide 1.2V.

Kindly provide the value of  termination and also give confirmation whether to provide supply of 1.2V.

Regards

Vigneshwar Raj

  • Vigneshwar,

    Since SYNC is basically a DC signal, termination is not required. I would suggest driving this as 1.2V LVDS if possible. FPGA's usually have LVDS output buffers with programmable differential output voltage (VOD ). Set this so that you are within the range of the ADS54J66 data sheet.

    Regards,

    Jim