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DAC7750: DAC7750 in Daisy-chain operation

pie
Prodigy 165 points
Part Number: DAC7750

Hello;

We got a PCN from TI (Notification# 20211209001) which states that the Daisy-chain operation is deleted out of the datasheet of the DAC7750.

In the E2E threads we found that problems occur in daisy-chain operation with watchdog-timer and frame error checking.

We already use the DAC7750  in daisy-chain operation (3  devices), no other SPI devices and ignore the alarm's.

We didn't find errors so far for several years

Is it safe to keep using it this way?

With kind regards;

Pieter Simons

  • 0
    TI__Guru* 94465 points

    Pieter,


    First, I want to say that we have not changed the device. If your device works in your application, it should continue to work.

    For the change to the datasheet, we had removed the daisy chain mode as a recommended mode of operation. As we had mentioned in the previous revision of the datasheet (in sections 8.3.9.1 and 8.3.10.1) there may be specific bit patterns that can erroneously cause the watchdog timer or the CRC to be enabled without a rising edge of the LATCH pin. These bit patterns were shown in Table 2 and Table 4 of the previous revision of the datasheet:

    With the use of the daisy chain, there may be a chance that this digital pattern could be seen through the course of sending multiple commands to multiple devices. This would accidentally enable the CRC or the watchdog timer.

    In the end, it's easier to use the device with a controller that can handle two independent sets of SPI, or use parallel SPI lines with separate /CS selections and a gated SCLK.

    If you are already using daisy chain mode and not having issues, then it is likely that your system does not ever generate these problematic bit patterns. Again, there is nothing that has changed with the device on this datasheet revision, so you should not expect any new behavior. We have removed daisy-chain operation from the datasheet to help avoid new customers having problems with the issue.


    Joseph Wu

  • 0 in reply to Joseph Wu
    Prodigy 165 points

    Hello Joseph;

    Thanks for your quick response:

    You said: "If you are already using daisy chain mode and not having issues, then it is likely that your system does not ever generate these problematic bit patterns."

    Is it possible that the system is generating problematic bit patterns and that  ignoring the alarm-output is solving the problem?

    Regards;

    Pieter

  • 0 in reply to pie
    TI__Guru* 94465 points

    Pieter,

    I think that it might be possible to ignore any problems that come up from the watchdog timer enable. However, the real issue would be the CRC. If the CRC is accidentally enabled, then you may lose communication with the device. I would note that the CRC is designed a little differently than expected and a bad CRC does not necessarily block the execution of the command. Here it the behavior:

    For the following write commands, the CRC error status condition blocks the execution

    • 0x01 Write DAC Data register – CRC error does not execute command and sets ALARM
    • 0x55 Write control register – CRC error does not execute command and sets ALARM
    • 0x57 Write configuration register – CRC error does not execute command and sets ALARM
    • 0x58 Write DAC gain calibration register – CRC error does not execute command and sets ALARM
    • 0x59 Write DAC zero calibration register – CRC error does not execute command and sets ALARM

    For these commands, the CRC error status is not checked, and the command execution is not blocked

    • 0x56 Write reset register - Execute command even with bad CRC (reset is 0x56 0x00 0x01 0x5E)
    • 0x95 Watchdog timer reset - Execute command even with bad CRC
    • 0x96 CRC error flag reset - Execute command even with bad CRC
    • 0x02 Register read - Execute command even with bad CRC

    Joseph Wu