My customer has a question for ADS124S06.
When there is no external available clock but CLK bit in Data Rate Register is wrongly set to use external clock, can the device be reset by /RESET signal?
The datasheet specifies required reset pulse duration by T_CLK. But in this case, it means there is no clock source. This is he background of this question.
Also when the device in the same situation, does the device still accept SPI command? Does SPI timeout function still work?