As we know, LMP92066 is having internal switches to make the Bias voltages to 0V for the event of TDD.
we would like to have the provision of Having DAC and FETDRV pins functionality
As per the schematics, If we are using the FETDRVX provision, we need to have the 10uF caps in DACX pins as per below figure.
Please find our implementation plan And please let us know the feedbacks,
Please note that,for simplification, we have considered only the DAC0 and FETDRV0 pins, same is applicable to DAC1 and FETDRV1 pins.
