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DAC8811: how to get power-on reset certainly

Part Number: DAC8811

Hello, TI staff,

I designed 24 channels DAC board on which 24 DAC8811ICDGKTs were used.

TPn(n=1-to-24) are the outputs of OPamps which are connected to the outputs of DAC8811s as I/V converter.

I measured TPn after power-up. The results were that TPn of 21 channels were 0V but those of 3 channels were not 0V.

And their values of 3 channels changed every measurement.

The measurements were done under the conditions that SPI interface (CLK/CSb/SDI) was all floating.

These pins have no pull-up resistors and were not connected to controller (FPGA).

Please teach me the method to get TPn=0V on power-up certainly.

(1) Even though SPI interface is not connected to controller, pulling up CLK, CSb, and SDI to VDD with resistors (4.7kohm-10kohm) leads to TPn=0V?

(2) Do the following parameters affect power-on reset?

(a) the ramp rate of VDD

(b) the power supply sequence between VDD (DAC8811) and OPamp


  • Hi,

    The initial shift registers are filled with zeros. However both the shift and DAC registers are filled with zeros during the power-on, on most of our devices usually they are set by the time the supply reaches ~2 V. This is because the chip has an OTP (one-time programmable) register that is responsible for setting the DAC to its default state during power-on.

    A very fast ramp rate on VDD can affect this behavior.

    At power up we recommend that all digital inputs should be at a valid state. Do not float these pins

    I suggest power up the supply for op amps first and then DAC.



  • Hi,

    Thank you for your quick reply. 

    What circuit for digital inputs (CLK/CSb/SDI) satisfies “a valid state”?

    It means “pull-up resistors”?

    Or it requires not only circuit conditions but also digital code inputs?

    I would like to know the concrete circuit and the procedure at power up.


  • Hi,

    Use pull up resistor (4.7K to 10K) on all digital inputs.