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ADS127L11EVM-PDK: Sinc4 filter - OSR12 - Incorrect Fi Calc(Hz) *2

Thomas Powdrill
Prodigy 30 points
Part Number: ADS127L11EVM-PDK

Hello,

Input signal of 1vPP @ 5Khz. With the configuration (Sinc4, OSR = 12, No clock Divider, High Speed Mode, Master clock 24Mhz) which results in 1Msps rate.  The Spectral analysis incorrectly calculates 10Khz for Fi Calc(Hz).  If I switch any setting, for example change OSR = 16 reducing my sampling rate to 750Ksps the Fi Calc (Hz) is correct.

I am using  ADS127L11EVM-PDK version 1.1.0

Is there an updated version?

Is this a known bug with Sinc4 filer, and OSR = 12 producing incorrect spectral analysis results?

Attached is video.  My input is 1vPP @5Khz.  The video shows Fi Calc(Hz) changing to incorrect value with Sinc4, OSR=12.  And correct with all other configurations. 

  • 0
    TI__Mastermind 36010 points

    Hello Thomas,

    First, welcome to the TI E2E Community!

    Yes, this is a known bug in the software, and will be updated in the next revision.  However, we do not have a set timeline when this will occur.

    This issue only occurs with OSR=12 setting.  Since the maximum SCLK frequency is fixed at the same frequency as the main CLK, it does not run fast enough to retrieve the data when OSR=12, and the software misses every other sample.  The ADC is converting data at 1MSPS (CLK=24MHz), but the GUI only retrieves every other sample, with an effective sampling rate of 500ksps.  The FFT software assumes the sample rate is 1MSPS, which is why it calculates the fundamental at 2x the actual input frequency.

    The work-around will be to use a higher SCLK frequency.  When you develop your own software, a good frequency to use with OSR=12 will be SCLK=1.5*CLK, or in the case of CLK=24MHz, SCLK=36MHz.  For all other OSR settings, I suggest keeping SCLK=CLK, since this reduces clock spurs that can show up in the spectrum.

    Regards,
    Keith Nicholas
    Precision ADC Applications