DAC8814: DAC8814 output issue.

Hi ,

Could you please share schematic for review

Hello Abu,

                    please find the schematic for the review.

Thanks,

Regards,

Roopa.

Where I can download pspice model for DAC8814C

Thanks, 

Regards, 

Roopa

Thanks Akhilesh. 

                 Could you please help me out   with the values of R1,R2 and Rf  in case design has to be modified to  get +10.24V & -10.24V. When we tried modifying the gain, we didn't get the symmetric output, much nonlinearity was observed.

Thanks,

Regards,

Roopa.

Hi,

As I understand from your requirements, full span required is 20.48V. What is the value of reference you are using?

Its better to have reference of 10.24V to start with for a symmetrical output design. Otherwise you may need to adjust the offset using a trim pot.

You can use REF102 to generate the required 10.24V reference.

Regards,

AK

Earlier it was designed for full scale +/-20V. Since the design couldn't meet the error band requirement, span has been increased to  +/-10.24V. We are using precision Reference voltage source REF102BU on the board. But the issue is provision hasn't been made to incorporate trim pot on the designed board. It is observed that tweaking the reference has resolved this issue.

Thanks,

Regards,

Roopa.

Hi,

Yes, you can tweak REF102 output to give you 10.24V and you are good to go.

Let me know if you need more help.

Regards,

AK

Hello Akhilesh,

          I have two questions.

1. Can we have fixed potential divider network instead of Trim Pot ? To tweak the reference of REF102BU , pot has to be connected to TRIM pin(PIN5) of REF102BU. Is there any formula to design the potential divider network?

2. Is there any method other than Trim Pot i.e. adjusting the gain by choosing proper resistance values that we could get bipolar output voltage +/-10.24V?

Thanks,

Regards,

Roopa.

Hi Roopa,

Either way you need a trim pot to adjust to get the required symmetric voltages.

I suggest get the reference voltage as 10.24V by using TRIM pin of REF102. TRIM pin has +/-300mV adjustment range. See the below circuit for the same.

After that use R2 as 4.87K to get the required span of +/- 10.24V.

attached TINA-TI sim file for your reference.

DAC8814_Customer.TSC

Regards,

AK

Hello Akhilesh ,

                     with the trim POT at the Reference IC , proper values have been observed observed for code 0000 and FFFF. Intermediate Values are not as expected.

               The code has been calculated as follows,

                                                                           Digital code D=     (Vout/Vref +1)*32768

           where,

                          Vref observed is = 10.24037V.

some Sample values which have been observed across 4 different channels..

Thanks,

Regards,

Roopa.

Hi,

I feel these are expected values. Make note that DAC has linearity errors too. Total unadjusted error for this DAC will be approximately 1.37mV (typical). What this means is that at any code your expected value can be within +/- of TUE.

Also the resistor tolerance error can contribute to this as well. If you do Monte Carlo simulation for this variation in resistor, you can get to know the spread of output voltage.

I did quick sim in Pspice for TI to evaluate the effects of resistor tolerance for code AEE0. Expected voltage is 3.75 +/- 1.37mV (device TUE error). see the histogram below.

Mean value is 3.749V as expected, But if you look at the 3*sigma value, its 70.68mV. This sim is with 0.1% resistor. if your tolerance is higher, you can expect higher deviation.

Hope this answers your query.

Regards,

AK

Hello akhilesh, 

                          Thanks for the detailed explanation. Can we conclude that DAC8814C is not an ideal choice if  error limit is +/- 2mV???? 

Thanks, 

Regards, 

Roopa. 

Hi,

It depends on whether you are doing calibration or not.

Regards,

AK