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ADS1282: Amplitude of CLK input?

Part Number: ADS1282

If the ADS1282 is powered from 3.3V, what is the required amplitude of the CLK in. I will be using a 4.096MHz clock. I'm looking for a PLL to drive 3 of ADS1282 parts.

I can see on page 16 of the datasheet that the CLK pin input impedance is 55k ohms, but not other specs are given.



  • Hi Steve,

    The amplitude of the CLK in would be governed by the Absolute Maximum Ratings section, table 5.1 on page 2 of the datasheet.  Logic high and low levels are specified in the Digital I/O section on page 4.

  • Hi Steve,

    I see that you were not happy with my answer to your query.  Can I ask for specific details on why that is the case?  The clock is one of the digital inputs and must be at 80% (minimum) of VDD to be considered valid.  So, with your 3.3V supply. the clock input needs to be at least  2.64V to be valid.