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DAC37J84: dac37j84 gain mismatch and gain error

Part Number: DAC37J84

Hi, 

From dac37j84.pdf page 8, 6.5 DC Electrical Characteristics table I can see that the DAC gain error is 2% FSR and the gain mismatch error is 2% FSR. 

Question1:

What is gain mismatch error? Is this gain mismatch between two separate DAC channels (knowing we have 4ch in the package) or maybe some other mismatch reference. I could not find a good definition in the document.

Question2:

How to understand the gain error in the context of the differential output of the device? Does it implies that the zero reference for the gain calculation is in the middle of the range (not at the zero code as it is typically for this parameter)? If that is the case then would that mean that at zero code we will have the maximum of the gain error or just 1/2 of the gain error?

Thanks,

Des

  • Hi Des,

    1. gain mismatch is the gain differences between the DAC channels

    2. gain error definition can be found in the following app note:

    https://www.ti.com/lit/an/slaa013/slaa013.pdf

    Figure 4. 

  • Thank you for the answers, they answer my first question.

    Regarding the second question and FIgure 4, I understand that the gain error can be at any point of the curve, but it is measured only after offset correction to code zero is applied. If this understanding is correct then this answers my second question.

    Thanks,
    Des

  • To elaborate my question a bit more, I m trying to asses the maximum offset possible at code zero. By the datasheet this value is 0.001 % FSR, while the gain error by datasheet is 2 % FSR. In this case, without initially compensating/calibrating for code zero I would think that code zero can have the total error equal to the sum of the two errors. This is my real question, what is the error of code zero without calibration.

  • Hi Des,

    my understanding gain error is defined with code zero calibrated. However, we can double check and get back to you.

  • Des,

    The ATE test for gain error on this device is as follows:

    1. Force 0x0 at reg0x30.
    2. Measure the current at P and N of DAC Outputs  and calculate the gain error per channel (=(I@P-I@N)/Iexpected-1)*100%.
    3. Log gain mismatch with +/-2% limits  between Ch A and B, and Ch C and D.
    4. Repeat step 2 and 3 for 0x7FFF@0x30 and 0xFFFF@0x30.

    Regards,

    Jim

  • Hi Jim, 

    This gives gain difference between the different channels, while I'm interested about the single channel offset without calibration.

    It seems logical to conclude from your post above that the 2% gain mismatch at code zero will show-up as offset, because the gain mismatch is measured at code zero for different channels.  

    Please correct me if I'm missing something here.

    Thanks,
    Des

  • Hi Des,

    Step 2 alone is the gain error calculation, with step 1 forcing the output at 0 code.