Other Parts Discussed in Thread: TXU0101
Let's say I'm running the ADS127L11 with AVDD and IOVDD at +5V and AVSS at 0V and I want to provide CLK with the output from an external oscillator.
What are the acceptable voltage levels for the CLK pin for that oscillator output. Would they fall under the 'digital input' spec?
With my IOVDD and AVDD config stated above, could the chip conceptually receive a 3.3V oscillator output on the CLK pin, assuming the CLK input falls under a different voltage level category?