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Hi Team,
we are trying to achieve TX & RX phase lock in our custom board. we have one DAC3482 on our tx side and one ADS5482 on our RX side.
we want to achieve constant phase difference of rx signal with respect to tx signal from power cycle to power cycle.
we have measured the tx signal delay using trigger signal as reference(we did this by using fifo bypass method in DAC). That is fixed every time.
My question is does this ADC support synchronization from power cycle to power cycle. i am not able to find any description in data sheet.
if supports what is the procedure to do?
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Thanks
Bala
Hi Bala,
We're currently looking into this for you and will hopefully have an answer soon.
Thanks,
Drew
Hi Bala,
Upon review of the datasheet, the synchronization feature you seek is not called out. However, the ADC has a 5 clock cycle latency that you can factor in every time you cycle power.
Thanks,
Drew
Hi Drew,
Thanks for the reply. one doubt does this 5 clock cycles latency is fixed on every power cycle or can it vary ?
Thanks ,
Bala
Hi Bala,
There is no variation. It is inherent in the pipeline architecture of the device.
Thanks,
Drew