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ADS7042: About the CS timing.

Kengo.Y
Guru 10700 points
Part Number: ADS7042
Other Parts Discussed in Thread: ADS7040,

Hi team,

My customer is considering a replacement from ADS7040.
But they need to control CS with 8bit timing.
What happens if CS is set high during conversion time on ADS7042?

Sincerely.
Kengo.

  • 0
    TI__Mastermind 22950 points

    Hi Kengo,

    If the CS is pulled high, the acquisition phase will start. This will interrupt the conversion phase and if the input is not fully settled, then there may be some error in the output code. I highly recommend to provide at least 14SCLKs as shown in the timing diagram for the ADS7042. 

    Is there a reason the customer wishes to switch devices?

    Regards,
    Aaron

  • 0 in reply to Aaron Estrada
    Guru 10700 points

    Hi Aaron,

    Thank you for your reply.

    That is because of the delivery troubles.
    My customer is considering replacing it, but be unable to make the software change, so I am posting.
    Could you tell me what kind of problem you are experiencing?

    Sincerely.
    Kengo.

  • 0 in reply to Kengo.Y
    TI__Mastermind 22950 points

    Hi Kengo,

    Since the ADS7042 is a 12-bit part, there is ~13SCLK cycles that need to be sent to cover the conversion time. If you are sending a CS frame length used with the ADS7040, then that time is shortened and you may experience some unexpected behavior. It is best to follow the timing diagram in the data sheet to ensure proper operation. 

    Regards,
    Aaron Estrada

  • +1 in reply to Aaron Estrada
    TI__Mastermind 22950 points

    Hi Kengo,

    After looking into this more, you can in fact bring CS high during the conversion phase. The output data will be truncated and the last 4 bits will be lost. Please note that you should still adhere to the timing specifications. 

    Please also note that the LSB size will still follow that of the 12-bit device. 

    Regards,
    Aaron Estrada