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DAC60501: VDD restriction? 3.9V?

Ella KIM
Expert 4092 points
Part Number: DAC60501

Hi Team,

I have a question on the figures in datasheet. As captured below, the data indicates only down to VDD=3.9V when REF-DIV=0 and BUFF-GAIN=0. Could you explain why the minimum supply 3.9V comes into play here?

Basically, this question arises while I try to figure out how two registers should be set for the best accuracy because REF-DIV=1 and BUFF-GAIN=0 would result in same result with REF-DIV=0 and BUFF-GAIN=1.

  • +1
    TI__Mastermind 19086 points

    Hi,

    These are the plots for internal reference of 2.5V. We need min headroom requirements for internal buffer. 

    Please see the below table.

    Regards,

    AK

  • 0 in reply to Akhilesh K
    TI__Expert 4092 points

    Hi Akhilesh,

    I'm still confused. Do you mean that the BUF in the capture below requires 3.9V at least in case of using 2.5V internal reference?

    Also I'm confused because I think VDD should be at least 5V for 2.5V reference and REF-DIV=0 and BUFF-GAIN=0. Per the equation below, VREFIO = 2.5V, DIV = 1, GAIN = 2. For full scale operation, VDD should be >5V (2.5V/1x2). Is my understanding incorrect?

  • 0 in reply to Ella KIM
    TI__Mastermind 19086 points

    Hi,

    REFIO voltage has to be in accordance with the VDD voltage. When VDD = 3.3V, max reference allowed is 1.65V (0.5*VDD)

    So for REFIO to be 2.5V without enabling REF_DIV bit, VDD should be 5V.

    WIth DIV disabled, and Gain set to 2, if you want REFIO to be 2.5V, VDD should be 5V (min)

    with REF_DIV = 1, Gain =2, VDD can be as low as 3.3V.

    Regards,

    AK

  • 0 in reply to Akhilesh K
    TI__Expert 4092 points

    Hi AK,

    I understand your comment. But I'm still wondering why 3.9V is minimum. If I understand your comment correctly, it should be 5V min.

    Could you clarify my question below?

    Ella KIM said:
    I'm still confused. Do you mean that the BUF in the capture below requires 3.9V at least in case of using 2.5V internal reference?

    In addition, when it comes to your comment below, I thought that VDD can be as low as 2.7V per datasheet. Is it correct?

    Akhilesh K said:
    with REF_DIV = 1, Gain =2, VDD can be as low as 3.3V.

  • 0 in reply to Ella KIM
    TI__Mastermind 19086 points

    Hi, 

    Please see my answers.

    I'm still confused. Do you mean that the BUF in the capture below requires 3.9V at least in case of using 2.5V internal reference

    --> No, depends on you enable DIV and BUF_GAIN. if you enable both, you can have device working with 2.7V with full scale range as 2.5V

    For my comment, I just took one example from the table.

    Regards,

    AK

  • 0 in reply to Akhilesh K
    TI__Expert 4092 points

    Hi AK,

    Sorry to make you reiterate but I still cannot understand. Please see the figure below. When both REF_DIV and BUF_GAIN is disable, the minimum VDD voltage is allowed only down to 3.9V. How does this number come? I thought the min voltage should be 5V for 2.5V reference voltage. 

  • +1 in reply to Ella KIM
    TI__Mastermind 34328 points

    Hi Ella,

    You are right, 5V is the minimum for REF_DIV = 0 and a 2.5V reference a based on the recommended operating conditions table. 

    And Akhilesh is right, if you enable both REF_DIV and REF_GAIN then you can have device working with 2.7V with full scale range as 2.5V as shown in the black line on the figure you shared. 

    For the case you are talking about with the red line, we've seen that you are able supply a VDD lower than 5V without the reference buffer shutting down, but this is not a recommended use case across all devices and all temperatures. So, I would not take the 3.9V shown in the figure as an allowable minimum because this not a guaranteed use case. I think they should have limited the VDD for the red line to 5V to avoid confusion. 

    Best,

    Katlynne