Hello guys,
One of my customers is considering using AFE5401-Q1 for their new products.
They have the following questions. Could you give me your reply for them?
Q1. About "Decimate-by-2" and "Decimate-by-4" function.
(1) Do these functions mean that the data is output every 1/2 or 1/4 of the device sampling rate?
(2) For example, Is the data rate 6.25MHz/ch when CLKIN = 12.5MHz (DIV_EN is disabled) in Decimate-by-2 mode?
(3) For example, Is the data rate 3.125MHz/ch when CLKIN = 12.5MHz (DIV_EN is disabled) in Decimate-by-4 mode?
(4) AFE5401-Q1 datasheet says in 6.3 Recommended Operating Conditions that CLKIN frequency range is 12.5~50MHz
with "With decimate-by-2 or decimate-by-4 modes enabled (DIV_EN disabled)(1) " condition.
When "decimate-by-2" mode or "decimate-by-4" modes enabled, can ADC work correctly even if CLKIN = 50MHz?
Q2. About "HPL_EN" and "HIGH_POW_LNA" mode.
(1) I think that the dynamic range can be improved when HPL_EN mode is enabled and S/N ratio can be improved when HIGH_POW_LNA mode is enabled.
Is there any disadvantage except power dissipation increasing?
(2) The device datasheet says in 6.5 Electrical Characteristics section that AVDD18 current consumption(IAVDD18) is 131mA(typ) with default mode.
Also the consumption is 153mA(Typ, 22mA higher than default mode one) with HIGH_POW_LNA mode enabled and it is 135mA(Typ, 4mA higher than default mode one) with HPL_EN mode enabled.
If both HIGH_POW_LNA mode and HPL_EN mode are enabled, is IAVDD18 about 157mA(Typ)?
Q3. Could you tell me the URL of application note about AFE5401-Q1?
Your reply would be much appreciated.
Best regards,
Kazuya.
