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ADC12J2700: What creates the biasing voltage of the JESD pins of the ADC12J2700?

Part Number: ADC12J2700

Hello.

Can someone tell me what instantiates the biasing of the JESD pins?  These are the DS [7:0]_P and DS [7:0]_N pins of the device.  Is the biasing established automatically on powerup or is it a result of some SPI command? 

We have a card that after some particular amount of time, the biasing drops from 400mV (normal) to 0.04V suddenly and we are trying to figure out what is happening to it.

Thanks 

Layne