Hi Team,
A customer has no output for DAC81416 and is asking to check their design. Please see detail below:

Thank you
Regards,
Marvin
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Hi Team,
A customer has no output for DAC81416 and is asking to check their design. Please see detail below:
Thank you
Regards,
Marvin
Hi,
Please make sure GENCONFIG register 0x3F00 ( enable internal reference)
Customer using synchronous or asynchronous update? Please share scope shots of the SPI frame as well.
Regards,
AK
Hi AK,
The customer Write GENCONFIG register 0x3F00 (0x04,0x3f00) and are using synchronous update(after power on ,pull down ladc pin)
Below is the scope shot as requested:
I hope this helps.
Regards,
Marvin
Hi Marvin,
Can the customer verify the internal reference's voltage?
After writing 0x3F00 to the GENCONFIG register, can they read it back to verify it was set properly?
Thanks,
Lucas
Hi Lucas,
Here is the customer response:
After power up, read GENCONFIG register, the data is 0x7f00. After writing 0x3f00 to the GENCONFIG register, read GENCONFIG register, the data is 0x0000. after writing 0x0a84 to the SPICONFIG register, read SPICONFIG register, the data is 0x0a84.
I hope this information helps.
Regards,
Marvin
Hi Marvin,
Can the customer measure and verify that RST and CLR are both being pulled high?
Thanks,
Lucas
HI Lucas,
They measure and verify that RST and CLR pin are both being pulled high after power up.
I hope this helps. Please let me know if you need more information
Regards,
Marvin
Hi Marvin,
Does the customer have SDO enabled in the SPICONFIG register?
Thanks,
Lucas
Hi Lucas,
Here is the customer response:
Hi Marvin,
Can you check if they have seen this issues on multiple DACs or only this one in question?
Have they verified with a probe that LDAC is low after the DAC is powered up?
If they can try to use asynchronous mode to see if the same output issue is present, that would be helpful too.
Thanks,
Lucas