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ADS7066: SDO State with AVDD Off

Part Number: ADS7066


What's the state of ADS7066's SDO pin while the AVDD (analog supply) is off but the DVDD is on? It looks the SDO level is still High and disturbs SPI communication of the other SPI slave devices on a shared SPI bus.

In the system, the ADS7066's AVDD is turned off when the system is put into a power-save mode. Hi-Z is expected at the SDO pin in this mode.

Best regards,
Shinichi Yokota

  • Hi Shinichi-san,

    What is the state of the /CS input to the ADS7066?  We would need to do some digging to see if there is an impact with AVDD missing, but the SDO is normally put into tri-state only when the /CS input is high.

  • Tom-san,

    The /CS input is pulled up to High in this case. Therefore, the SDO output should be Hi-Z. However, it looks the SDO becomes High when the AVDD supply is turned off. That's the issue.

    Could you look into it?

    Best regards,
    Shinichi Yokota

  • Hi Yokota-san,

    I have more detail for you.  The ADC core, including digital circuits, are powered by AVDD. If AVDD is powered off, the device is not functional. If DVDD is up before AVDD, the device does not malfunction, but the digital outputs will not function as described until AVDD is powered up.