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ADS1278-SP: operating below AVDD min

Part Number: ADS1278-SP


We are using the ADS1278WHFQ-MLS adc converter and need to understand the impact of operating below the AVDD min of 4.75V spec.  Can you provide any insight? 

This is difficult to hold in our design, which uses a SMPS to generate 5.2V +/- 1.62% RSS… passed through an LDO (TI TPS73801MDCQPSEP) to clean it up but with .35V dropout and tol of +/- 2.73% RSS. 


SMPS tol : 5.2 – 1.6% = 5.12V

LDO dropout: 5.12V - .35V = 4.77V

LDO tol: 4.77V – 2.73% = 4.64V


This leaves 4.64V for AVDD at ADC… which falls below the 4.75V spec.



I cannot easily move the SMPS set point up as it’s a Crane module, already built.


I could change to an LDO with even lower dropout requirement, if such a beast exists for space.


Otherwise, if the 4.75V min for AVDD is real, I’ll need to replace LDO with an RLC filter to cleanup the SMPS output and feed filtered to AVDD.


  • Hello Adam,

    I searched through the characterization data, and I could not find any data for AVDD less than 4.75V, other than an AVDD input current verses voltage plot.  This plot only showed a negligible decrease in current between 5.25V and 4.5V.  The reset threshold voltage for AVDD is much less than 4V, so I do not think there will be any sudden shifts in performance for AVDD voltage slightly less than 4.75V.

    However, all datasheet specifications were determined with operating AVDD supply of 4.75V or greater, and TI cannot ensure proper operation or performance outside of the recommended AVDD operating range.

    If possible, I would see if there is a better LDO that could be used to guarantee 4.75V or greater supply voltage.

    Keith Nicholas
    Precision ADC Applications