ADS9224R: Timing Diagrams for DVDD at 1.8V

Jason Haedt

Part Number: ADS9224R

Hello,

DVDD can support 1.65V~5.5V on the datasheet. But all the timing requirements are specified with DVDD@2.35V~5.5V. I don’t see any timing requirements when DVDD<2.35V. Does TI have different numbers from 1.65V~2.35V?

-Jason

over 2 years ago

0 Ryan Andrews over 2 years ago

TI__Guru 64086 points

Hi Jason,

Let me check with the design / systems team whether any of these timing specifications would be affected by DVDD < 2.35 V. For the moment, I only see that SCLK must be limited to 20 MHz or less when DVDD < 2.35 V.

Regards,

Ryan

0 Jason Haedt over 2 years ago

TI__Expert 4220 points

Any feedback on this request?

0 Ryan Andrews over 2 years ago in reply to Jason Haedt

TI__Guru 64086 points

Hi Jason,

It looks like the main difference is with respect to the digital input high and low levels. For DVDD < 2.3 V, the input signal must be closer to DVDD or DGND to be recognized as a digital high or low, respectively.

Regards,

Ryan

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ADS9224R: Timing Diagrams for DVDD at 1.8V