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ADS8860: GBW of the ADC dirver

Part Number: ADS8860

Dear team,

In the datasheet of ADS8860, It mentioned that the UGBW of the ADC driver should be 4 times larger than then 1/2piRfltClt, which is also mentioned in training video "The Math Behind the R-C Component Selection TIPL 4406 TI Precision Labs – ADCs".  Why the the UGBW of the ADC driver should be 4 times larger than then 1/2piRfltClt, which is Op amp four times faster than filter? Is there any mathematical theory behind this "four times"?


Best regards

Wesley  

  • Hello Wesley, 

    As shown in the screenshot you shared, it is a rule of thumb, thus I do not know if there is a mathematical theory. 

    I will share the Analog Engineer's Pocket Reference Guide that may provide some background on this. On pages 132 and 133, shown below, it proves the equation and table for settling time based on device resolution. 

    Regards

    Cynthia
     

  • Dear Cynthia,

    Thanks for you sharing. But I still can't not see the connection between this material and my question. Would you mind generally explaining that? or do you have any other document could explain this "4" number?

     

    Best regards

    Wesley  

  • Wesley,

    The basic idea is that the RC filter should not limit the amplifier bandwidth in any appreciable way.  Setting the filter cutoff lower than the amplifier bandwidth would essentially be wasting amplifier bandwidth.  Conversely, setting the bandwidth of the filter too high would be similar to not using the filter at all.  We found the factor of 4 to be a good value empirically and have been using it for years as a starting point.  Nevertheless, we generally will simulate the circuit to assure stability and good settling.  Often in the simulation process, we use a parameter step approach to look at settling and optimize the circuit.  This is why the last section in the "The Math Behind the R-C Component Selection" video you mentioned, suggests a range of resistances for spice iteration.  The reason why there is not a simple closed form solution to this problem is that most amplifiers have complex open loop output output impedance which impacts settling and stability of the circuit.  I hope this is helpful to you.

    Art