Part Number: ADC3662
In 8.5.2, it says the interface can function with SCLK <=12MHz.
But in the table below it shows it can go to 20MHz:

Which is correct?
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Part Number: ADC3662
In 8.5.2, it says the interface can function with SCLK <=12MHz.
But in the table below it shows it can go to 20MHz:

Which is correct?
Hi Jason,
As you have mentioned, it looks like in the datasheet we have recommended in Section 8.5.2 to run <= 12 MHz, but in the timing requirements table the SCLK maximum is listed at 20 MHz. I will double check to see if this is indeed the case and get back to you.
Thanks, Amy