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ADS1299: Why does datasheet example for DC Lead-off detection enable AC lead-off detection at fDR/4?

Part Number: ADS1299

Hello,

In section 10.1.2.1 of the latest (Revised Jan 2017) ADS1299 datasheet, the dc lead off example suggests setting LOFF register to 0x13

This contradicts the register description which says that

Bit 4: is reserved and should be always 0

FLEAD_OFF[1:0]: These bits should be 00 for DC lead-off

Is this is a mistake in the datasheet?

If it is, then should the correct value for LOFF be 0x00 for enable DC lead-off detection with  lead off current set at 6 nA and comparator threshold set to 95%P and 5%N?

Ankit