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DAC11001B: DAC11001B design verification for ultra clean output voltage

Part Number: DAC11001B
Other Parts Discussed in Thread: TMUX1119, REF6230, , DAC11001A, OPA828

Hi Texas,

 With DAC11001BPFBT I want to generate ultra-clean DC frequency bipolar buffered output voltage (-2.5 V to 2.5V) with micro-volt (say 50 uV) precision which will be further cascaded to precision analog switches (TMUX1119). I wanted to critically analyze the possible loopholes in the attached DAC design schematic for guaranteed device performance. I have the following queries:

  1. I have used quad channel OPA4187IRUMR to design the reference section, will this arrangement (schematic attached for 3V external reference with REF6230) give any non-ideal behavior of REF_PS, REF_PF, REF_NS, REF_NF,DAC_ROFS?
  2. Will the DAC outperform if given the maximum possible headroom from reference supply(+/-3 V) to VCC (+10V), VSS (-10)? For minimization of noise floor should we decrease the VCC, and VSS supply?
  3. Since DAC1101 gives unbuffered output voltage, for DC buffer output, should we use high accuracy instrumentation amplifier with Gain=1 as a buffer or precision opamp with a minimal offset voltage, ultra-low noise etc? To design non-inverting buffer (also inverting buffer ie Gain =-1) with minimum noise, offset… Could you please clarify a possible list of design parameters and parametric specifications (Offset voltage, Noise, zero drift, input bias current) that one must follow for the same?
  4. For mentioned requirement among e-Trim, super beta, and zero-drift opamp technology which one should be the best choice and why?

Thanks and Regards,

Deepak

  • Akhilesh will review this and provide some input.  He will respond on monday.

    Thanks,

    Paul

  • HI Deepak,

    Thanks for reaching us . 

    1. I have used quad channel OPA4187IRUMR to design the reference section, will this arrangement (schematic attached for 3V external reference with REF6230) give any non-ideal behavior of REF_PS, REF_PF, REF_NS, REF_NF,DAC_ROFS?

    AM: Reference buffer schematics seem ok,  OPA4187provides 20nV/Hz noise which higer than DAC noise 7nV/Hz. you can consider OP827 which offer better noise performance 4 nV/Hz.
     
    2. Will the DAC outperform if given the maximum possible headroom from reference supply(+/-3 V) to VCC (+10V), VSS (-10)? For minimization of noise floor should we decrease the VCC, and VSS supply?
    As per datasheets, DAC11001A = 3V head room , DAC11001B =5 V headroom for better performance. I don't think supply voltage decrease will help here.

    3. Since DAC1101 gives unbuffered output voltage, for DC buffer output, should we use high accuracy instrumentation amplifier with Gain=1 as a buffer or precision opamp with a minimal offset voltage, ultra-low noise etc? To design non-inverting buffer (also inverting buffer ie Gain =-1) with minimum noise, offset… Could you please clarify a possible list of design parameters and parametric specifications (Offset voltage, Noise, zero drift, input bias current) that one must follow for the same?

    AM: Instrumentation Amp(INA) typically used in amplify differ signal between to inputs and application required very large amplification (G= x100, x1000). The
    preferred output configuration is unity gain non- inverting buffer since internal noise gain is lower than inverting configuration.
    Also,  we recommending OPA828 as output buffer since it provide very low noise(4nV/Hz) which comparable to DAC11001A/B

    4. For mentioned requirement among e-Trim, super beta, and zero-drift opamp technology which one should be the best choice and why?

    AM: Selection of opamp and it technology depends on application requirement and below is my short comments.

    Super beta : It offer low bias current with higher gain and lower bias drift over temperature.
    Zero -drift : Auto compensations of input offset, low input offset and low narrow band noise.
    e-Trim: This technology helps improved accuracy of device by calibration of offset and temp drift final manufacturing. The applications are ultra-low offset and excellent temp drift performance.

  • Hi Anbu

    Thanks for the detailed clarifications. Have launched the design, will revert to you incase of any issue in hardware debugging.

    Regards,

    Deepak

  • Hi Deepak,

    Sure , please let us know for further support.