ADS1120-Q1: ADC Converter for 1% accuracy data

Dear Hari,

thanks a lot for reaching out and your interest in our ADCs for your BMS application.

To be honest, I am a little surprised that you are not meeting the 1% accuracy target with ADS1120-Q1.
The initial gain error (ADC gain error + VREF error) at Ta=25°C should be <0.25%.
The gain drift is dominated by the VREF drift which is worst case 40ppm/°C. If your temperature range is from -40°C to 85°C then the additional error due to temperature drift should be less than [25°C - (-40°C)] x 40ppm/°C = 0.26%.
That means even without any gain calibration you should be able to achieve a measurement accuracy of better than 1%.

A few questions:

• Are you performing any offset and gain calibration?
• Are you accounting for the shunt accuracy and drift? This can often be the dominating error source in a shunt based current measurement application.
• Do you have any circuitry (besides RC filters) between the shunt and the ADC inputs that could introduce an additional gain error?
• At what signal level compared to the ADC full-scale are you measuring the gain error?
  If you measure gain error with a very small input signal compared to full-scale then offset error might be dominating the error.

Reducing the reference voltage will not help to improve the accuracy. It will potentially help to improve resolution very slightly.
Using an external VREF with a better initial accuracy and lower temperature drift than the internal VREF however will improve the accuracy.

One key benefit of the ADS131B04-Q1 is that it can measure bi-directional currents using a low-side shunt without the need for a bipolar analog supply or the need to level shift the shunt signal.
With ADS131B04-Q1 you will most likely require gain calibration because the initial gain error at Ta=25°C could be up to 0.7% already as shown in the datasheet.

Regards,
Joachim Wuerker

Hi Joachim Wuerker,

Good day!

Thanks for the response; I couldn't get to it sooner due to on-duty travel and important meetings. Currently, we are doing the  background study of full implementation to identify the factors reducing accuracy.

Regarding ADS1120-Q1 implementation,

The gain and FSR details are as follows,

1. Voltage sensing: is performed with the help of voltage dividers, and the sensing range is 0–1000 V.

• Gain                            = 1
• FSR                             = 3.32
• Reference is              = 3.32V 

       2. Current sensing: performed using the shunt resistor method, with a sensing range of 0-300 A.

• Gain                           = 64
• Operating Mode         = Turbo 
• SPS                            = 2000
•  

And we are not performing offset , gain error, and gain calibrations, we will check the same for implementation; are there any reference documents for the same?

Will increasing the gain from 64 to 128 have any effect on improving current sensing accuracy?

Attached here are the schematic images and software implementation details for the sensing sections, please check and let me know of any changes or modifications.

Regards,

V Harikrishna

Hi Harikrishna,

thanks a lot for the additional details. I got some of that information from Frank as well.

First of all I wanted to mention that increasing the gain, reducing the data rate, or reducing the reference voltage will primarily reduce the noise of the ADC, it will generally not improve the accuracy (offset and gain error) - unless your accuracy is limited due to the noise of the ADC.

One comment regarding your register settings. The "50/60[1:0]" bits will have no affect in your case. Those bits are only applicable when using the 20SPS data rate setting. I would therefore leave those bits at 00b.

Is there a specific reasons why you don't want to use the internal VREF for the voltage measurement? I would expect the internal VREF to have better accuracy and stability than the 3.3V supply. You would have to adjust your resistor divider to attenuate the signal some more in that case.
Please note that the accuracy and stability of the voltage reference directly impacts the gain error of your measurement.

The schematics look okay in principle:

• It might be good to reduce the value of the filter resistors (R8 and R9) for the current shunt sensing and also use 0.1% resistors for those. The input currents into the ADC will cause a voltage drop across the filter resistors which will eventually show up as an offset (or gain) error in your system. To identify the root cause of your accuracy issues it might be good to replace those resistors with 0Ohm and compare the performance.
• You have tied the CSn signals of both ADCs to GND. I assume both ADCs are not connected to the same SPI bus in your case, correct?
  In general I would advise to frame communication with the CSn signal. That way the SPI resets and is in a known-good state each time you start communication. If CSn is tied low permanently, there is a chance that the communication between the ADC and host gets out of sync if there are any glitches on the SPI bus, especially on the SCLK line.

Regarding calibration.
In general you will require offset and gain calibration to achieve high accuracy. Although, as mentioned above, it should theoretically be possible to achieve 1% accuracy without calibration using ADS1120-Q1 - assuming the external shunt has very high accuracy.

• First you would implement an offset calibration. To do that you need to apply a 0V input signal in some way and then measure the output of the ADC.
  You could for example use a 0A current through the shunt and use that for "system" offset calibration.
  Alternatively you can short the inputs of the ADC together internally using the MUX[3:0] = 1110b setting. This will only calibrate the offset of the ADC itself, we call that "self" offset calibration.
  In both cases you would collect multiple readings from the ADC, average the results and then store that value as your offset compensation value in your MCU. The MCU would then subtract that value from every conversion result to get an offset corrected reading.
• Gain calibration is unfortunately a little harder to implement. For gain calibration you would have to apply a precision test signal to the ADC which is close to the full-scale signal you want to measure. The accuracy of the test signal directly impacts the accuracy of the calibration.
  In your case you would for example have to apply a 300A precision current source to the shunt.
  You would then again collect multiple readings from the ADC and average the results. Then you need to compare that value to the ideal expected output value to derive the gain calibration factor.

Regards,
Joachim Wuerker

Hi Joachim Wuerker,

Okay, thanks for the clear explanation on the calibration part. I will proceed with the implementation.

And regarding the SPI bus, yes, both ADC ics are operating with separate communication lines.

Regarding hardware change , I will try to change  R8 and R9 resistors to lower value with better tolerance.

Thanks and Regards, 

V Harikrishna 

Sounds good Harikrishna.

Keep me posted on your results.

Regards,
Joachim Wuerker