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TLV5638: DAC not showing output for any input signal

Part Number: TLV5638

I have connected PIC 18F6520 Microcontroller output to DAC DIN, SCLK and CS. All inputs are coming correctly, when analysed on the oscilloscope. I am first giving an output of 0XD002 for programming with internal reference of 2.048V. Then giving 0x4FFF for getting all Ones through output B. However I am not getting any output.

Also, since the DAC IC has a strip on it, instead of a corner mark/notch, I have taken the pin to the left of the strip as Pin 1. Kindly confirm this as well

  • Illia will take a look at this.

  • Hello Girish, 

    The code is correct. 

    Since you are setting up internal reference, it could be a good idea to check VREF pin to see if it is indeed at 2.048V. If it is not, then there is a failure in communication. Could you please provide me reading of your SPI communication so I can make sure that all timing is done correctly? Additionally, could you send me a picture of your schematic also to make sure that all of the connections are correct. 

    Thank you, 

    Illia Volkov 

  • Hi Illia,

    I have attached the timing diagrams taken on the oscilloscope for the DAC inputs.   There are 3 images. Data input given is 0X D002 (for control )and  0x4AAA (data word). The first image is comparison with DIN and CS. 2nd image is between DIN and SCLK and 3rd is with SCLK and CS. 

    I have also attached the schematic of how DAC is connected to our PIC18F6520. I am not getting any Voltage at the REF pin of DAC as well.

    Kindly resolve this issue. Also could you confirm how to identify pin no.1 of the IC as there is no notch/corner mark on IC. 

  • Hello Girish, 

    Yes, when you rotate the device when a strip is away from you, the pin no. 1 will be on the left. If there is no voltage on vref pin then it seems like there is an error in communication. I was looking at your timing diagram, and it seems like CS pin timing is off. Make sure that the data transfer happens when CS goes LOW, and it ends when CS goes HIGH. After 16 bit transfer, pull cs up to finish communication. 

    Let me know if this helped? 

    Thank you, 

    illia Volkov 

  • Hi Illia,

    The CS signals are showing as you have mentioned in the timing diagrams. I have attached the diagrams again with clear indication of the graphs so there wont be any confusion.

    You can notice that for the DIN-CS graph, after the CS (green,below) goes low 2 sets of 8 bit data (yellow,above) are transmitted, after which the CS becomes high. Upon further inspection we can see that the data we are transmitting is at first 4A and then AA. CS stays high for some time. Then again the CS goes low before the data is sent. After all 16 bits are transmitted, CS rises. 

    Similarly in the SCLK (yellow) and CS (green) graph,  serial clock appears after CS goes low. After 16 cycles, the CS goes high. And so on. 

  • Illia is reviewing and will reply tomorrow.

  • Hello Girish, 

    I wonder if there is an issue due to the fact that there is a pause between each byte. I have a few things in mind that might cause the issue: 

    1)  Due to the pause between bytes device times out and discards the data as invalid 

    2) When you restart the clock to transmit second byte do you follow the timing requirements? There is a need for a little time for the device to register that clock is initiated. Also, could you zoom in that region to make sure that clock and data transfer are aligned?

    Could you try to transmit both bytes consecutively and see if the problem persists? Additionally try connecting a different device and see if the problem persists.  

    Thank you, 

    Illia Volkov