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ADS127L11: Parallel ADC Question

Part Number: ADS127L11

Hi Team,

I have a board with 4x ADS127L11s in parallel.  They all share the same SDI line, hence they should all be configured the exact same.  However, one of the ADS127L11s (SDI2) that I'm reading conversion data from stays high after all the data has been shifted out.  None of the other three ADC do this. Do you know why this may be?

They were configured to be in data output and DRDY mode, so they should all be behaving like SDI2. Thank you in advance!

  • Hello Alex,

    After /CS goes high, the SDO pin will be Hi-Z.  If there is no pull-down on the SDO pin, then it will float and the logic analyzer may read a high or a low, depending on the total amount of leakage current.  You can verify if this is the case by adding a 100k pull-down to the SDO pin; it should always return to 0 when /CS is high.

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • Hello Keith,

    Thank you for the help. Currently, I have no pull down for any of the SDO pins, but I can enable it on the processor side. Do you recommend pulling the line down? Also, why do you suspect that it only happened for one of the ADCs?

    Best regards,

    Alex Walton

  • Hello Alex,

    It is not necessary to pull the line down.  I only recommended to pull the SDO pin down to confirm that this was the root cause.

    Regarding why it only happens on one of four channels, it would be related to leakage currents on the board, which can be unpredictable.  The source of the leakage could be due to ADS127L11 SDO pin, or the IO pin on the MCU, or the logic analyzer input channel channel.  If there is solder flux that was not fully cleaned off the board, this could also explain why only 1 of 4 channels remains high.

    Regards,
    Keith