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ADS5474: Clock input solutions

ArTzy
Genius 15349 points
Part Number: ADS5474
Other Parts Discussed in Thread: LMK1D1208I, CDCLVD2106, LMK00725

Hi Experts,

I need help choosing a clock for the part ADS5474IPFP from 120mhz. It has that 3.1V offset and I'm not familiar with the options for this. I think it may be HCSL clock type. The data sheet doesn't offer any clue as to what type of clock the inputs work with but it does have the various levels and limits but my chances of picking a clock that works is not good I'm afraid.

Thank you.

Regards,
Archie A.

  • 0
    TI__Mastermind 25980 points

    Hi Archie,

    I think it would be best to follow the clock recommendations in the datasheet.

    7.3.1 Clock Inputs The ADS5474 device clock input can be driven with either a differential clock signal or a single-ended clock input. The characterization of the ADS5474 device is typically performed with a 3-VPP differential clock, but the ADC performs well with a differential clock amplitude down to approximately 0.5 VPP, as shown in Figure 37. The clock amplitude becomes more of a factor in performance as the analog input frequency increases. In low-input frequency applications, where jitter may not be a big concern, the use of a single-ended clock could save cost and board space without much performance tradeoff. When clocked with this configuration, it is best to connect CLK to ground with a 0.01-μF capacitor, while CLK is ac-coupled with a 0.01-μF capacitor to the clock source, as shown in Figure 36

    For a recommendation on a clock part, I would recommend a high slew rate buffer driver. LMK00725/LMK1D1208i/CDCLVD2106 comes to mind. Some customers may use a balun or transformer as well.

    Regards,

    Rob

  • 0 in reply to Rob Reeder
    TI__Genius 15349 points

    Hi Rob,

    Thank you for your support. Further discussed:

    I plan to use a single ended clock its only 120mhz and the clock output will be right at the ADS5474 clock pin. I'm old school CMOS days the differential stuff causes me to pause. The 3.1V offset also is an issue you can't just connect a CMOS clock to that. It would be great if the data sheet provided a simple example of a HCMOC AC couple clock single ended option.

    Regards,
    Archie A.

  • +1 in reply to ArTzy
    TI__Mastermind 25980 points

    Hi Archie,

    Its comment practice to use a balun or transformer, to convert the single-ended signal to differential. Then DC block on the secondary side to disconnect the offset. The ADC's clock inputs pins really just need low noise, high slew rate and be within the clock pins input levels for good sampling performance. As an example, see page 20 of the user guide.

    Regards,

    Rob