Hi,
I am considering this ADC for my design, and I have a few questions about it:
1. I need to sample it at the rate of 300KSPS. does this ADC have a minimum sample rate?
2. deep power down mode:
* does the internal oscillator shuts down on this mode?
*do I need another protection for the ADC inputs while it in this mode? or the clamping diodes are still active there?
thank you!
Hello Roee,
No, the ADS8332 does not have a minimum sample rate. The sample rate is controlled by the CONVST pin and can be any frequency from 0sps up to 500ksps. Figure 11 in the datasheet shows the analog supply current verses sample rate for auto-nap mode.
Yes, the internal oscillator is shut down during deep power down. The internal oscillator is only active during the conversion period.
The inputs always have ESD clamp diodes present, clamping the input between AGND and VA. However, if the input voltages can exceed the ABS max specification of -0.3V up to VA+0.3V, then the input current must be limited to less than 10mA by using an external resistor.
We have a newer device with better specifications that you may want to consider: ADS8167. ADS8167 has lower noise (higher SNR), and better DC specifications for a similar price. In addition, ADS8167 includes an internal reference and reference buffer.
https://www.ti.com/lit/ds/symlink/ads8167.pdf
Regards,
Keith Nicholas
Precision ADC Applications
