• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 46 subscribers
  • Views 162 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AFE5828: ADC# to LVDS# mapping table missing: Can more than x2 ADCs (x2 LVDS mode) be used or is this x2/x4/x8 data packing reserved for JESD only ?

Matthieu MAINDROU
Prodigy 20 points
Part Number: AFE5828
Other Parts Discussed in Thread: AFE58JD28

I would like to enquire as to whether one can compress more than the x2 ADC channels onto just x1 LVDS lane ?

Is it possible to compress x8 ADCs onto LVDS#1+LVDS#9 respectively (DECIMATION=8 , DWN_CONV_BYPASS=True, COMPR_FACTOR=3)

The datasheet does not make this very clear for the LVDS mode.

  • 0
    TI__Expert 6790 points

    Hi Matthieu,

    Thanks for reaching out.

    The AFE5828 device does not support data compression except for LVDS_2x mode where you can combine at most 2 channel data at lower sampling speed so as to maintain maximum LVDS lane rate of 1Gbps.

    However, if you are using AFE58JD28 device, then features such as demoduation and data compression using decimation is available. In that case, for eg decimation factor M = 8, you should be able to combine 8 ADC channels onto 1 LVDS lane.

    Hence, can you confirm, are you using 58JD28 device or 5828 device and also let me know your Fs. I will let you know the data pattern for your use case.

    Thanks & regards,

    Abhishek

  • 0 in reply to Abhishek Vishwa1
    Prodigy 20 points

    Abhishek,

    Thank you for clarifying.

    We will indeed be using the AFE58JD28

    Fsampling: 38.4MHz -
    _____________________________________
    <DWN_CNV_BYPASS>='1'
    ____________________________________
    <DEC_BYPASS>='0'


    <MANUAL_DECIMATION_FACTOR>=8

    <FRAC_DEC_FACTOR>=0

    ___________________________________

    <COMPR_FACTOR>=3
    <COMPR_OTHER_CH_DATA_EN>='0'
    ___________________________________


    I believe this means LVDS<1> will carry ADCs<1-8> and LVDS<9> will carry ADCs<9-16> ?
    In which order will those be sent out on the respective LVDS lanes ?

  • 0 in reply to Matthieu MAINDROU
    TI__Expert 6790 points

    Hi Matthieu,

    I will send you the data packing scheme to you by tomorrow.

    Meanwhile please share your email address so that I can correspond to you. 

    Since this device is NDA restricted, it would be best to share details over email rather than E2E. 

    FYI, my email is: abhishek.vishwa27@ti.com

    Thanks & regards,
    Abhishek