For this ADC, the "absolute maximum ratings" states that the voltage at SCLK, SDATA, and CS should not exceed min(2.2 , AVDD +0.3). But the "Digital Characteristics" table states that the same pins (SCLK, SDATA, and CS) are compatible with 3.3V CMOS.
Could you please clarify whether these pins can handle 3.3V inputs?
