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ADS1235: SCH Review

Part Number: ADS1235

Based on this circuit design, 15 prototypes were tested on power and found that the input current of the DVDD was 24mA.

One step of testing revealed that when PIN8 (RESET) is pulled to 0V, the input current of the DVDD is also 24mA. When PIN7 (PWDN) is pulled to 0V, the input current of DVDD is also 24mA.

Sending commands to ADS1235 through the SPI interface did not receive any data, all of which were 0xFF. The SPI timing is shown in the following figure.

1. Could you please help check if this principle is correct? What areas need to be modified if they are incorrect?

2. The input current of DVDD is also 24mA, which should be unreasonable. What may be the reason for this?

3. Is the SPI timing of sending commands to ADS1235 in the following figure correct?

  • Hi HY Yang,

    Some questions for you:

    1. How are you measuring the DVDD current?
    2. Where are you measuring the DVDD current in the system? Right at the DVDD pin on the ADC, or somewhere else?
    3. Is the 24mA an average or peak value?
    4. You mentioned that the current is 24 mA when RESET and PWDN are brought low - is this the only time that the DVDD current is 24 mA?
      1. If yes, what other conditions cause the DVDD current to be 24 mA?
    5. Have you checked the board for routing or layout errors, or bad solder joints, etc.? There is no obvious reason why the ADC would draw this much current, unless there is a short / path to ground somewhere

    -Bryan