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ADS127L01: Offset- and Gain Calibration for FSYNC interface

Part Number: ADS127L01

Hi,

the datasheet says that offset- and gain-calibration is possible in the SPI interface mode.

Can I also configure this with SPI, and then switch the ADC to Frame Sync interface mode for the actual sampling?

I'm asking because chapter 8.4.2 of the datasheet says that when a change is sensed on the Hardware Mode Pins after power-up the device automatically resets (and thus would reset the calibration registers?).

In the specific sub-chapter 8.4.2.1 for the interface mode pins this is not repeated, yet it is repeated for the filter selection and OSR selection pins. So I am not sure now.

In our application we need to use 4 of these ADCs in parallel via FSYNC Slave mode (master is also possible but we would prefer slave), but we would also like to use the internal calibration registers if at all possible.

Thanks in advance and best regards,

Hans

  • Hello Hans,

    Welcome to the TI E2E community.

    Unfortunately, when changing from SPI to Frame Sync, you will get an internal reset which will set the registers to the default values.  In fact, since you have 4 ADCs in your system, you will also need to specifically force a RESET, either through SPI software RESET, or through the hardware RESET pin, to ensure all ADCs are synchronized.

    No, it is not possible to use the internal calibration registers by setting in SPI mode and then changing to Frame Sync mode.

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • Hi Keith,

    thank you for your quick reply.

    Regards,

    Hans