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ADS6145: How to switch DDR mode to CMOS mode

Conor
Guru 11425 points
Part Number: ADS6145

Hi,

I plan to capture it in FPGA with 80Mbps sampling in switching to CMOS mode(DDR) mode.

We are considering switching to CMOS mode because there is a possibility that the timing will not keep up with DDR.

Should I change DRVDD from 3.3V to 2.5V when switching from LVDS mode to CMOS mode? Are there any other pins that need to be changed?

Thanks,

Eevee

  • 0
    TI__Mastermind 35350 points

    Hi Eevee,

    No, please follow the recommended operating conditions of the datasheet.

    Thanks,

    Rob

  • 0 in reply to Rob Reeder
    Guru 11425 points

    Hi, Rob

    Is it correct to understand that the decision between LVDS and CMOS is determined only by the DRVDD voltage?
    Also, is the decision made only when the power is turned on?

    Thanks,

  • +1 in reply to Conor
    TI__Guru* 91947 points

    Eevee,

    If the part is set to use parallel interface mode, the voltage applied to the SEN pin will determine if the part comes up in CMOS mode or LVDS mode. See table 2 of the data sheet for more information regarding this.

    If the part is set up to use serial programing interface, the part will come up in CMOS mode (default value of "0" for bit D8 of register 0x00). To change this to LVDS mode, write a "1" to bit D8 of address 0x00.

    Regards,

    Jim