Other Parts Discussed in Thread: ADC3663, OPA837, REF3318, LMK04828
Hello,
I`m trying to replicate one of the figures of the ADC3663 datasheet, to be sure my setup is right.
Concretely, I'm trying to replicate figure 6-40, Single tone FFT at Fin = 1 MHz.
The acquisition of the data is done through an FPGA board connected to the ADC3663 EVM. For the configuration of the EVM I`m using ADC35XX EVM GUI.
I have checked that the acquisition of the data is correct by using the ramp test pattern.
The rest of the setup is basically the default configuation of the EVM, except for the external supply. The setup is as follows:
- External 5V supply (J16 shunted in 1-2 position)
- External +1.6V voltage reference (REF3318 + OPA837 mounted on the board)
- External sample clock. Sample frequency: 65 MSPS
- External DCLKIN clock. Frequency: 260 MHz. Level: 10 dBm.
- Input signal: 1 MHz. A bandpass filter is used to eliminate harmonics from signal generator. Attenuation of harmonics is > 60 dB.
- Default components for glitch filter
I am getting the attached figure.
The signal level is -5 dBFS, as I am not being able to get a higher level with my available instruments.
The noise floor is similar to that of figure 6-40, but harmonics are much higher than expected: HD2 is -78 dBFS (below -90 dBFS in datasheet) and HD3 is -68 dBFS (below -80 en datasheet)
I have tried to add a low pass filter (Fc = 65 MHz) for the sampling clock. I have also tried to change the clock`s amplitude. But I am not getting better results.
Is there anything else required to get the figure of the datasheet?
Thanks,
Miguel