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ADS54J60: ADS54J60

Part Number: ADS54J60
Other Parts Discussed in Thread: THS4541,

Dear TI Reps,

   Please review the schematic attached herewith. Kindly give us the feedback/comments at the earliest.

 Regards,

Shambhuling D

(Manager, D&E/MS)

  • Shambhuling,

    Comments:

    1. You need to provide power sequencing to the ADC's per the data sheet. The TI EVM uses different value capacitors on the LDO NR/SS pin but I would suggest using the PG and EN pins to accomplish this.

    2. Using 100MHz VCXO for the LMK may provide more frequency options than the 122.88MHz part.

    3. Suggest using a separate LDO for the AVDD3V3_ADC power rail.

    4. The ADC has 100 Ohm internal termination for the CLK input. The external 100 Ohms is not needed.

    5. Make sure all four ADC CLK's and SYSREF traces are matched, not just the individual pairs. 

    Regards,

    Jim

  • Thanks for your reply. Our signal characteristics are mentioned below.

    1. On time - 20 ns

    2. rise time - 3 to 4 ns

    3. fall time - 3 to 4 ns

    4. Max amplitude - 5 V

    5. Pulse period 4 ms

      We need measure all these parameters. My doubt is whether our ADC input ckt  is OK or changes required?

  • Your ADC input CLK is fine. Just make sure to use the LVPECL 2000mV option for the LMK setting.

  • What you mean by ADC input CLK, I am talking about ADC analog input side signal characteristics.

  • Hi Shambhuling,

    I think Jim may have interpreted ckt as a typo for clk instead of shorthand for circuitry.

    If the goal is to operate the ADC at 1GSPS then I would suggest changing the 122.88MHz VCXO to 100MHz as Jim suggests above as well. This will provide many more frequency options than the 122.88MHz part. If using 1GSPS, you should be able to capture the rising edge no problem but from what you describe the signal characteristics seem like the application is more DC coupled specific as the input signal is a pulse that will remain high for the 4ms time period, correct? The 10.76 dB pi attenuator is adequate and will attenuate any 5V AC signals down to around 1.5V.

    Thanks

  • pulse will remain high for 20 ns only. 4ms total period of the signal not on time.

  • if it is DC pulse, should we remove  capacitor in balun ckt ? Also can i take input frequency as 250 Hz for Spur and SNR calculation as per ADC datasheet?

  • Our signal input to adc is Single ended, whether this ckt will work for single ended signal? It is shown as 2 sma connectors, that is our mistake, actually only one sma connector will be used to feed the signal.

  • Hi Shambhuling,

    Depending on the rise time of the pulse, this may be possible with the current configuration. The faster the rise time of the pulse, the less time the pulse is having any AC component meaning it has more a DC component. I think that you will have to DC couple for this kind of input pulse but let me discuss a bit more with the team.

    If you do end up needing to DC couple, you'll have to use a single ended to differential amplifier of sufficient bandwidth and slew rate. For instance, if no AC signal will be present beyond 600MHz, you could look into THS4541. This will perform single ended to differential conversion and also allows for common mode input (Vocm) from the ADC (VCM) pin. You'll have to remove any and all series capacitors from the signal chain and ensure the amplifier is configured for 1:1 gain to use the existing pi attenuator network you've designed. I suggest to leave a series 0 ohm resistor in place of one pair of these AC capacitors in the event that you need to do AC coupling, meaning you will not have to design and manufacture an entirely new board if you add an extra few 0 ohm resistors. When connecting the VCM (output from ADC) to the Vocm (input of amplifier) pin, it is common to design a resistive divider into this path to allow adjustment of the amplifier's common mode output. I would suggest adding a series 0 ohm resistor into this path as well in the event that you would like to disconnect the VCM to Vocm connection (useful for reverting to AC coupled mode where common modes are floating).

    I will update you with results of discussion with team later today.

    Thanks, Chase

  • Dear Chase,

      I am waiting for your updates/suggestions. Please give us the updates/suggestions at the earliest.

    Regards,

    Shambhuling D

  • Shambhuling,

    If you need to accurately quantize data while the pulse is remaining high or low then you must DC couple. If you are only interested in the rising and falling edge then AC coupling will be fine.

    Thanks

  • As  I told earlier, we need to measure both on time and rise & fall time of pulse. So what to do?

  • Shambhuling,

    I am unable to decide your system requirements for you however I can make the recommendation that DC coupling is the better option for you.

    Thanks

  • Dear Chase,

    We want experiment with ADS54J60EVM evaluation demo board for single ended pulse. In page no.2 of EVM schematic balun ckt is present. Please suggest us the relevant schematic  modifications to be made in evaluation board so that single ended pulse can be fed to evaluation board.3225.ADS54J40EVM_ADS54J60EVM-SCH_D.pdf

  • Hi Shambhuling,

    The EVM is already configured for single ended input. This EVM only has a balun option for converting single ended signal to differential signal which is required by the ADC. The ADC cannot simply accept a single ended input.

    To evaluate with DC coupling, first you will need to have an amplifier EVM. Then you will have to add an additional SMA connector onto J1 (AINM) and J4 (BINM) and bypass the balun by removing R7, R8, C6, C7, C14, C15 and populating the following components with 0 ohm resistors: R3, C1, R4, C3, R21, C12, R22, C13. This is how DC coupling is enabled on this EVM. 

    Regards, Chase

  • Please suggest suitable amplifier evm part no.