Hi team,
Could you please advise the R and C below of ADC1015-Q1 internal Sample and Hold block?
I plan to add an external capacitor to compensate high impedance source and I would like to know the above value to calculate it.
regards,
Hi Shinji,
The ADS1015-Q1 is a delta-sigma ADC. It does not have an RC sample and hold block like the one in your picture. Sample and Hold blocks like the one you provided are found in SAR ADCs, which typically do require external compensation.
Instead, the ADS1015 has an internal switched-capacitor input stage where capacitors are continuously charged and then discharged to measure the voltage between AINP and AINN that looks more like figure 7.5.
The capacitors used in this input stage are small, and to external circuitry, the average loading appears resistive.
You can find the typical common-mode and differential input impedance values for different FSR test conditions in sections 6.5 of the data sheet.
What you would typically need on the inputs to a delta-sigma ADC is anti-aliasing filtering.
Make sure to consider the typical value of the input impedance. Unless the input source has a low impedance, the ADS1015-Q1 input impedance can affect the measurement accuracy. For sources with high-output impedance, buffering may be necessary.
You can learn more about the difference between SAR and delta-sigma ADCs in the 'SAR and delta-sigma: Understanding the difference' section of out TI precision labs series: Analog-to-digital converters (ADCs) | TI.com
Best Regards,
Angel
