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ADC3664EVM: ADC3664EVM

Kailyn Chen
Genius 9560 points
Part Number: ADC3664EVM

Hello，

One customer need to realize the below goal by changing EVM board.


He'd like to confirm if the DCLKIN and sample signal are both provided by FPGA, if he could still use GUI for configuration. He need 1-wire, decimation=8, if he need to connect R133-R137 and using verilog for FPGA configuration. 

  • +1
    TI__Mastermind 21345 points

    Kailyn,

    This is possible if the state of these IO's (at the FPGA side) are High-Z whenever he decides to connect via USB and program using GUI. If not, there may be contention on any of these lines which will not allow SPI interface to work properly.

    Thanks

  • 0
    TI__Genius 14901 points

    Hi Kaitlyn,

    If using the TI TSW1400 capture solution, then only the DCLK can be supplied from the FPGA, the routing does not support using the FPGA as a sample clock.

    Regards, Amy