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ADC12D1000: AutoSync feature

Harry Ma
Intellectual 1930 points
Part Number: ADC12D1000

Hi Team

Customer wanna facilitate the autosync feature of ADC12D1000. they try to configure system depend on the following note. but can't works.

Can you show your insight that what kind of information that customer providing to help identify the root reason that doesn't works?

Thanks!

https://www.ti.com/lit/an/snaa073g/snaa073g.pdf?ts=1686729258574&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FADC12D1000 

  • 0
    TI__Guru* 91947 points

    Harry,

    Can you get the customer to provide the following to help us trouble-shoot this:

    1. A schematic showing all clocking, Rcout, RCLK input, data and DCLK output connections for the ADCs.

    2. Register settings being loaded to each ADC.

    3. How are you verifying synchronization isn’t working?

    4. Can they apply a common input signal (like a low frequency sine) with the same phase to all ADCs and the provide the resulting output data from all ADCs (data in a single file, with each ADC data in a separate column, time aligned)?

    Regards,

    Jim

  • 0 in reply to jim s
    TI__Intellectual 1930 points

    Hi Jim

    1. A schematic showing all clocking, Rcout, RCLK input, data and DCLK output connections for the ADCs.

     

    1. Register settings being loaded to each ADC.

    1. How are you verifying synchronization isn’t working?

    Using a external signal source inputs one same signal to both ADC simultaneously, and reset the ADC repeatedly to observe and compare the time difference between two signals which ADC acquired. 

    1. Can they apply a common input signal (like a low frequency sine) with the same phase to all ADCs and the provide the resulting output data from all ADCs (data in a single file, with each ADC data in a separate column, time aligned)?

    It has been tested through step3 way. but customer observed that whatever if they using autosync or not, there is no difference in the time difference which two ADC acquired. means autosync not works.

  • 0 in reply to Harry Ma
    TI__Mastermind 24800 points

    Hi Harry,

    Please have the customer provide a block diagram and/or pictures on how they are trying to sync these two ADCs. Are they using their own board design? or two of our EVMs?

    Regards,

    Rob

  • 0 in reply to Rob Reeder
    TI__Intellectual 1930 points

    Hi Reeder

    Customer are using the following structure to achieve autosync, one as master, and another one is the slave1. and they are using their own board

  • 0 in reply to Harry Ma
    TI__Mastermind 24800 points

    Hi Harry,

    Please forward to the customer....

    Per the attached documents, after setting the base settings there is a tuning step required.

    DRC register setting should be adjusted from min to max and DCLK output should be observed on an oscilloscope (put DCLK of ADC1 on channel A which is the trigger source, and put DCLK of ADC2 on channel B). Watch for instability of DCLK2 versus DCLK1 and determine the center of the stable range of DRC settings.

     

    Are they following that step?

    AN-2132 snaa073f.pdf

    Synchronizing Multiple GSPS ADCs in a System February 2013.pdf