Other Parts Discussed in Thread: ADC32RF54, ADC12DJ3200
Hi team,
i am analyzing the Noise Spectral Density values of the ADC12DL3200.
With default full-scale range it is about -150 dBFS/Hz.
This value is obtained with no input signal and with a sampling clock of 3.2 GHz.
So, if the sampling clock is 2 GHz, what is the NSD expected value?
Is it correct to say that by reducing the sampling clock, the NSD value gets worse?
For example, from 3.2 GHz to 2 GHz, the NSD should get theoretical worse of factor 10log10(3200/2000)=2 dB. So, from -150 dBFS/Hz it becomes -148 dBFS/Hz.
Is it correct?
Thank you in advance.
Best Regards,
Matteo Ricci