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DAC38J82: Clock Input Standard Reg.

Part Number: DAC38J82


I am planning to use DAC38J82 for the below application and i have the below query,


DAC CLK: 2400MHz

Output Freq: 250 to 700 MHz

Resolution: 16Bit

Fdata: 600Msps


1)I have only CML clock outputs in my system with VOD=420mVpp (typ). Is there a way to interface CML clock to DACCLKP/N inputs of DAC38J82?

2) will there be any degradation in phase noise of the outputs? If so, how much?

Thanks in-advance,


  • Hi Deva,

    I am checking on this and will get back to you soon.

    Regards, Amy

  • Hey Deva, 

    The DAC38J82 clock input structure has a differential input impedance of 100 ohm which plays nicely with CML. As the common mode voltage is likely different between your clock output and the DAC's clock input structure you would want to AC couple the clock coming from your source. We do this on all our designs anyways. A 0.1uF capacitor will work for that. 

    420mVpp should be enough to drive the clock. 

    In terms of performance this will depend on the spectral purity of the clock as well as the phase noise. The CML nature of the clock will not impact the performance of the DAC, however.