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ADC12DJ3200EVM: Working in dual-channel mode, the voltage of one channel's sampled data is reversed

Lei Zhou
Prodigy 100 points
Part Number: ADC12DJ3200EVM

Hi,

I tried the dual channel mode of ADC12DJ3200EVM with TSW14J56. 

The signal of two channel are 10 MHz +/- clock which displayed in oscilloscope as fig. 1.

fig. 1 10MHz pos/neg clock

Howerver, in the HSDC, the sampled data looks as fig. 2

fig. 2 sampled data of dual-channel

It seems that there exists voltage reverse of one channel. But I couldn't figure out the real reason. 

I hope for your help!

Best,

Lei

  • +1
    TI__Mastermind 20541 points

    Hi Lei,

    To make the layout easy the Balun on CHA vs CHB is flipped by 180 degrees. As a result when you input is signal which is offset by 180 degree on two channels, the resultant signal end up being aligned with each other. 

    Regards,

    Neeraj

  • 0 in reply to Neeraj Gill
    Prodigy 100 points

    Hi Neeraj,

    Thanks for your reply. So, when ADC working at dual-channel mode, the sampled signal of two channels have the difference as followed.

    1. The voltage of one channel has been reversed.

    2. The sample time of one channel has a delay of "1/(2*fs)".

    Is my understanding above correct？And if there exist other difference I don't mention?

    Best,

    Lei

  • +1 in reply to Lei Zhou
    TI__Mastermind 20541 points

    Hi Lei,

    As I mentioned before. The two input will be out of phase from one another by 180 degree because the two input Baluns are flipped by 180 to make the layout easy.

    Regards,

    Neeraj