Other Parts Discussed in Thread: ADS131B04-Q1, LP5907
I have noticed that comms with the ADS131B04Q1-EVM works more reliably (specifically the reset command) when the PHI is attached, even when the PHI is not powered!
I am powering the board using TP1 and TP2 for AVDD and DVDD respectively from an MCU development board. I have removed R45. All of the header pins on J6 are in use apart from DIGITAL.CLK as I am using the on board 8.192 MHz oscillator.
Is there any obvious reason for this? Can you provide a schematic for the PHI board? I just want to make sure that the FPGA isn't providing some extra signals that I am missing as I intend to use the ADS131B04 ADC on our specific design and so need to have confidence in the firmware.