DAC53204: 4-Wire SPI not working

Mark Garrett

Part Number: DAC53204
Other Parts Discussed in Thread: DAC63204EVM, SN74HCS367

Hi,

I have a DAC53204 that I'm intending on using in 4-wire SPI mode. I am using the following programming sequence and am not seeing the expected results.

#define DAC53204_REG_COMMON_TRIGGER ((uint8_t) 0x20)
#define DAC53204_REG_GENERAL_STATUS ((uint8_t) 0x22)
#define DAC53204_REG_INTERFACE_CONFIG ((uint8_t) 0x26)

    // Unlock device registers
    uint16_t reg = 0x5000;
    err          = write_register(p_handle, chip_select, DAC53204_REG_COMMON_TRIGGER, &reg);

    // Enable SDO for 4-wire SPI.
    reg = 0x1;
    err          = write_register(p_handle, chip_select, DAC53204_REG_INTERFACE_CONFIG, &reg);

    // Validate the hardware by checking the ID register (read_register issues a NOP per Figure 7-15. SPI Read Cycle of TRM)
    err          = read_register(p_handle, chip_select, DAC53204_REG_GENERAL_STATUS, &reg);

I'm currently seeing the following on my logic analyzer:
CPOL=1, CPHA=0

CPOL=0, CPHA=1

After the SDO-EN bit is written, I do see MOSI go low which according to some other DAC53204 posts, seems to be the correct behavior.
I do not see the DEVICE-ID (should be DAC53204: 02h) in the final NOP access in either case. I do see that the MSB (bit 24) of the read access and NOP is set in 3 different points here but since that is not where the read data is coming from it doesn't seem important.

Any insight on why I'm unable to read the DEVICE-ID?

I have tried 0.5MHz and 1.0MHz SCLK frequencies.

Thanks,

Mark

over 1 year ago

0 Katlynne Jones over 1 year ago

TI__Mastermind 30888 points

Hi Mark,

This looks alright at first glance. Do you have a pullup on the SDO pin? It is an open drain pin so it can only pull the line low.

Best,

Katlynne Jones

0 Mark Garrett over 1 year ago in reply to Katlynne Jones

Prodigy 10 points

Hi Katlynne, thanks for the response! Yes we do have a pullup on the SDI pin of the DAC. We also have another SPI peripheral that shares the MISO line that is working. I have confirmed that only the chip select of the DAC is pulled low during this transaction.

I have used the SW reset available in the COMMON-TRIGGER to see if that helped with no luck. I did notice that I had to insert a delay after the reset otherwise I wouldn't see SDO pulled low so that tells me the reset was at least doing something.

I have also attempted to write the DAC-0-DATA register to see if it was just the SDI line that wasn't working but that didn't seem to change the voltage on OUT0 but I may be missing another step here before I actually see any change.

Any other ideas?

Mark

0 Katlynne Jones over 1 year ago in reply to Mark Garrett

TI__Mastermind 30888 points

Hi Mark,

The DAC output channels need to be powered on before they will output any data.

Can you try the following writes to check if you can update OUT0.

I was assuming your writes were working due to the behavior on SDO after you send the command to enable SDO. Just to confirm, the pullup is on the SDO (MISO) pin? You mentioned SDI (MOSI).

It looks like you're using a saleae logic analyzer. Can you take a look at the analog output for the SDO channel to see if there is anything happening that the digital channel isn't picking up?

My next suggestion would be to disconnect the other device's SDO line from the bus to check if that changes anything.

Best,

Katlynne

0 Mark Garrett over 1 year ago in reply to Katlynne Jones

Prodigy 10 points

Katlynne, below is a scope of the original transaction from up above for the CPOL=1/CPHA=0 case. I do see the same 0x80 in the MSB as before with the logic analyzer. So there is at least some activity on the SDO pin. And yes, I did have a typo on my previous message; SDO (MISO) has a pullup. I'm unfortunately unable to easily disconnect the other SPI device as it is already on a board. The good news is that the sequence you sent me did work and I am able to see a voltage now on OUT0 so it would appear that the DAC itself is functional. This will unblock me for now but it would be great if we could get SDO working. I will talk to our hardware guys and see what can be done for an isolated test but any other ideas would be appreciated. Thanks!

Channels are:

1. MISO

2. SCLK

3. MOSI

4. CS

0 Katlynne Jones over 1 year ago in reply to Mark Garrett

TI__Mastermind 30888 points

Hi Mark,

Thanks for the scope plots. It doesn't look like SDO is trying to As an alternative to removing the other device, would it be possible to hook up the SPI signals to the DAC63204EVM and use that as an isolated test? You could leave the SDO on the EVM unconnected from the bus and just view it with the scope. I've sent you an e2e friend request with a direct message, please check that.

You can also share your schematic and I can review to make sure there is nothing there that could be causing the issue.

Are you writing anything else to the DAC? Are you configuring anything in the GPIO-CONFIG register (you shouldn't be), or just enabling the SDO in the INTERFACE-CONFIG register?

Best,

Katlynne Jones

0 Mark Garrett over 1 year ago in reply to Katlynne Jones

Prodigy 10 points

Katlynne,

Nothing else is being written to the DAC other than the device unlock. The code snippet from my first message contains the only writes being performed.

Here are the relevant parts of our schematic as it pertains to the DAC. If it isn't clear, we are multiplexing the SPI bus using a SPI 1/2 active signal. So far every peripheral on SPI bus 1 and 2 have worked using this scheme. Let me know if anything looks suspicious. Thanks!

0 Katlynne Jones over 1 year ago in reply to Mark Garrett

TI__Mastermind 30888 points

Hi Mark,

I don't see anything wrong with this schematic as long as you have a pullup somewhere on the SPI_DIN signal. And it should be on the SPI_DIN, not on the other side of the AND gate where the SPI1/SPI2 MOSI signals are.

Beyond that, I'd say let's check on the EVM and see if there are different results.

Best,

Katlynne

0 Mark Garrett over 1 year ago in reply to Katlynne Jones

Prodigy 10 points

Copy on the pullup placement. I'll verify with the hardware folks. In the mean time I will check with the EVM when it arrives and share the results here. Thanks!

0 Mark Garrett over 1 year ago in reply to Mark Garrett

Prodigy 10 points

Actually, sorry. I made an error in my last assessment as I was looking at the pullups on CS, not MISO. It looks like don't have a pull-up directly on MISO. Here is a terrible MS paint that shows the full MISO path from MCU to DAC. For context, the MCU and DAC are on separate PCBs with line drivers in between the MCU and DAC. Can you confirm if this is a workable configuration for the DAC53204?

0 Katlynne Jones over 1 year ago in reply to Mark Garrett

TI__Mastermind 30888 points

Hi Mark,

Thanks for the update. No, the MISO (SDO) pin of the DAC will need a pullup before it connects to the SN74HCS367. The SDO output is open drain, so there is no circuitry in the DAC to pull the pin high. I assume you are measuring the MSIO line close to your controller after the SPI bus select logic? There is something there that is pulling the MSIO line high while the DAC SYNC is low which is why we are able to see the DAC eventually pull the line low, but the DAC cannot pull the pin high without a pullup.

Best,

Katlynne Jones

0 Mark Garrett over 1 year ago in reply to Katlynne Jones

Prodigy 10 points

Thanks for the info, Katlynne. I'll see what can be done about adding a pullup before the SN74HCS367 and keep you posted.

0 Katlynne Jones over 1 year ago in reply to Mark Garrett

TI__Mastermind 30888 points

Hi Mark,

Sounds good. And the EVM has the pullup on the SDO pin if you would still like to verify with the EVM when it arrives.

Best,

Katlynne

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DAC53204: 4-Wire SPI not working