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TI-JESD204-IP: Arria 10 support for DAC38J82 and ADC12J4000

Part Number: TI-JESD204-IP


We have been promised JESD support for INTEL FPGAs for over three years now. Do you have any updates?

Or do you recommend changing the design?

Honestly, if it is not your intention to support Intel then I suggest that you make that statement.


  • Hi Geir,

    The primary reason for the delay has been the variation in PHY architectures across Intel FPGA families (Arria10 / Stratix / Agilex), which in turn results in an IP architecture that doesn't easily scale across platforms. This has, in contrast, been far more manageable with Xilinx transceivers, which is why you see TI JESD IP support for all families starting the 7000 series.

    I understand that the delay has been longer than anticipated, and we are working with Intel to try and accelerate this vector. However, it will be difficult to project a timeframe for an official release.